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DDR5 UDIMM Interposer for Oscilloscopes

Overview

DDR5-A-UDM-288 Product Image

The DDR5-A-UDM-288 unbuffered dual-inline memory module (UDIMM) interposer enables probing of DDR5 UDIMMs with an oscilloscope.

  • All major oscilloscope vendors supported
  • 288-pin, UDIMM
  • JEDEC Standard JESD79-5
  • Easily access signals
  • Small keep-out volume (KOV)
  • S-Parameters for system simulation
  • Oscilloscope de-embedding S-Parameters
  • Add digital analysis using the DDR5-D-UDM-288 interposer

Midbus Probing

The DDR5-A-UDM-288 is a midbus probing solution. This enables complete signal access to the DDR5 bus for visibility and compliance analysis using a convenient UDIMM slot interposer. XH Series BGA interposers are also available for DDR5.

Simulation and De-Embedding

S-Parameters are included for target simulation and the creation of oscilloscope de-embedding filters.

Signals Probed

All signals are probed.

  • CK0_A/B
  • CK0#_A/B
  • CK1_A/B
  • CK1#_A/B
  • CS0#_A/B – CS1#_A/B
  • CA0_A/B – CA12_A/B
  • ALERT#_A/B
  • RESET#_A/B
  • DQ0_A/B – DQ31_A/B
  • DM0#_A/B – DM3#_A/B
  • DQS0_A/B – DQS4_A/B
  • DQS0#_A/B – DQS4#_A/B
  • CB0_A/B – CB3_A/B
  • HSCL
  • HSCA
  • HAS
  • PWR_GOOD
  • PWR_EN
  • VIN_BULK
  • RFU2
  • RFU3
  • RFU7
  • RFU143
  • RFU144
  • RFU149
  • RFU152
  • RFU213
  • RFU226
  • RFU288

Dimension Drawings

DDR5-A-UDM-288 Dimensions Front
DDR5-A-UDM-288 Dimensions Side

Testing Services

The following services are available for this interposer.

Target Boot & Basic Functionality

For each target, this service will power on and ensure functionality of the target with the interposer(s) installed.

Add Digital Analysis

MA5100 Product Image

Add logic and real-time compliance analysis using a DDR5-D-UDM-288 interposer and a MA51x0 series logic analyzer.

M51x0 Series Analyzer & DDR5-D-UDM-288

A MA51x0 series analyzer and a DDR5-D-UDM-288 interposer enable protocol debug, compliance analysis and oscilloscope cross-triggering. With a turn-key setup, the MA51x0 can analyze thousands of real-time memory parameters across clock stops and frequency changes. Also includes 11ps x 10mV x 20-channel analog characterization (iCiS™) and dynamic probe termination.

Dimension Drawings

Product Configuration Table

Product Name Description Nexus Order Number
DDR5-A-UDM-288 DDR5 UDIMM Interposer for Oscilloscopes NEX-DDR5-A-UDM-288

Primary Sidebar

Datasheets

  • DDR5-A-UDM-288 Datasheet

Similar Products

  • DDR5 Main Memory Interposers

Family

This product/family is part of the electrical compliance validation development cycle.
This product/family is part of the electrical compliance validation development cycle.

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